1. Field of the Invention
The present invention relates to a method for forming patterns for semiconductor device, and more particularly, to a method for forming semiconductor device involved with multiple patterning technique.
2. Description of the Prior Art
Photolithography is one of the basic processes used for manufacturing semiconductor devices which construct integrated circuits (ICs) in semiconductor factory. When fabricating those semiconductor devices, wafer/substrate or layers formed on substrate is/are patterned to create geometric features for realizing the elements that are to form the devices. As semiconductor manufacturing processes continue to advance, the dimensions of circuit elements have continually been reduced while the amount of functional elements, such as transistors, has been steadily increasing over decades. That is, the feature size becomes smaller while the pattern including those features becomes more and more complicated. As feature sizes continue to decrease, the existing lithography processes meet their bottleneck to successfully render the features.
However, the ultimate goal in integrated circuit fabrication is to faithfully reproduce the original circuit design. There is therefore a continuing need in the semiconductor processing art to develop a method for precisely forming the wanted/desirable features on wafers.